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1 lt1028/lt1128 n voltage noise 1.1nv/ ? hz max. at 1khz 0.85nv/ ? hz typ. at 1khz 1.0nv/ ? hz typ. at 10hz 35nv p-p typ., 0.1hz to 10hz n voltage and current noise 100% tested n gain-bandwidth product lt1028: 50mhz min. lt1128: 13mhz min. n slew rate lt1028: 11v/ m s min. lt1128: 5v/ m s min. n offset voltage: 40 m v max. n drift with temperature: 0.8 m v/ c max. n voltage gain: 7 million min. n available in 8-pin so package the lt1028(gain of C1 stable)/lt1128(gain of +1 stable) achieve a new standard of excellence in noise performance with 0.85nv/ ? hz 1khz noise, 1.0nv/ ? hz 10hz noise. this ultra low noise is combined with excellent high speed specifications (gain-bandwidth product is 75mhz for lt1028, 20mhz for lt1128), distortion-free output, and true precision parameters (0.1 m v/ c drift, 10 m v offset voltage, 30 million voltage gain). although the lt1028/ lt1128 input stage operates at nearly 1ma of collector current to achieve low voltage noise, input bias current is only 25na. the lt1028/lt1128s voltage noise is less than the noise of a 50 w resistor. therefore, even in very low source impedance transducer or audio amplifier applications, the lt1028/lt1128s contribution to total system noise will be negligible. ultra low noise precision high speed op amps u s a o pp l ic at i flux gate amplifier voltage noise vs frequency + demodulator sync output to demodulator lt1028 1k 50 w square wave drive 1khz flux gate typical schonstedt #203132 1028/1128 ta01 frequency (hz) 1 0.1 1 10 10 100 1028/1128 ta02 voltage noise density (nv/ ? hz) 0.1 1k 1/f corner = 3.5hz 1/f corner = 14hz typical maximum v s = ?5v t a = 25? s f ea t u re n low noise frequency synthesizers n high quality audio n infrared detectors n accelerometer and gyro amplifiers n 350 w bridge signal conditioning n magnetic search coil amplifiers n hydrophone amplfiers d u escriptio
2 lt1028/lt1128 supply voltage C55 c to 105 c ................................................ 22v 105 c to 125 c ................................................ 16v differential input current (note 8) ...................... 25ma input voltage ............................ equal to supply voltage output short circuit duration .......................... indefinite a u g w a w u w a r b s o lu t exi t i s operating temperature range lt1028/lt1128am, m ..................... C 55 c to 125 c lt1028/lt1128ac, c ......................... C 40 c to 85 c storage temperature range all devices ........................................ C 65 c to 150 c lead temperature (soldering, 10 sec.) ................. 300 c wu u package / o rder i for atio s8 part marking lt1028cs8 lt1128cs8 order part number order part number order part number 1 2 3 45 6 7 8 top view ?n +in v s8 package 8-lead plastic soic v+ out + v os trim v os trim over- comp 1028 1128 lt1028amh lt1028mh lt1028ach lt1028ch lt1028amj8 lt1028mj8 lt1028acj8 lt1028cj8 lt1028acn8 lt1028cn8 LT1128AMJ8 lt1128mj8 lt1128cj8 lt1128acn8 lt1128cn8 lt1028cs16 top view v + v os trim ?n out over- comp +in v ? (case) 8 7 5 3 2 1 4 h package 8-lead to-5 metal can v os trim + 6 n8 package 8-lead plastic dip 1 2 3 45 6 7 8 top view ?n +in v v+ out + j8 package 8-lead ceramic dip over- comp v os trim v os trim symbol parameter conditions min typ max min typ max units v os input offset voltage (note 1) 10 40 20 80 m v d v os long term input offset (note 2) 0.3 0.3 m v/mo d time voltage stability i os input offset current v cm = 0v 12 50 18 100 na i b input bias current v cm = 0v 25 90 30 180 na e n input noise voltage 0.1hz to 10hz (note 3) 35 75 35 90 nv p-p e lectr ic al c c hara terist ics v s = 15v, t a = 25 c, unless otherwise noted. lt1028am/ac lt1128am/ac lt1028m/c lt1128m/c top view s package 16-lead plastic sol 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 nc nc trim ?n +in v nc nc nc nc trim v + out nc nc note: this device is not recom- mended for new designs over- comp +
3 lt1028/lt1128 symbol parameter conditions min typ max min typ max units input noise voltage density f o = 10hz (note 4) 1.00 1.7 1.0 1.9 nv/ ? hz f o = 1000hz, 100% tested 0.85 1.1 0.9 1.2 nv/ ? hz i n input noise current density f o = 10hz (note 3 and 5) 4.7 10.0 4.7 12.0 pa/ ? hz f o = 1000hz, 100% tested 1.0 1.6 1.0 1.8 pa/ ? hz input resistance common mode 300 300 m w differential mode 20 20 k w input capacitance 5 5 pf input voltage range 11.0 12.2 11.0 12.2 v cmrr common-mode rejection ratio v cm = 11v 114 126 110 126 db psrr power supply rejection ratio v s = 4v to 18v 117 133 110 132 db a vol large-signal voltage gain r l 3 2k, v o = 12v 7.0 30.0 5.0 30.0 v/ m v r l 3 1k, v o = 10v 5.0 20.0 3.5 20.0 v/ m v r l 3 600 w , v o = 10v 3.0 15.0 2.0 15.0 v/ m v v out maximum output voltage swing r l 3 2k 12.3 13.0 12.0 13.0 v r l 3 600 w 11.0 12.2 10.5 12.2 v sr slew rate a vcl = C1 lt1028 11.0 15.0 11.0 15.0 v/ m s a vcl = C1 lt1128 5.0 6.0 4.5 6.0 v/ m s gbw gain-bandwidth product f o = 20khz (note 6) lt1028 50 75 50 75 mhz f o = 200khz (note 6) lt1128 13 20 11 20 mhz z o open-loop output impedance v o = 0, i o = 0 80 80 w i s supply current 7.4 9.5 7.6 10.5 ma e lectr ic al c c hara terist ics v s = 15v, t a = 25 c, unless otherwise noted. lt1028am/ac lt1128am/ac lt1028m/c lt1128m/c symbol parameter conditions min typ max min typ max units v os input offset voltage (note 1) l 30 120 45 180 m v d v os average input offset drift (note7) l 0.2 0.8 0.25 1.0 m v/ c d temp i os input offset current v cm = 0v l 25 90 30 180 na i b input bias current v cm = 0v l 40 150 50 300 na input voltage range l 10.3 11.7 10.3 11.7 v cmrr common-mode rejection ratio v cm = 10.3v l 106 122 100 120 db psrr power supply rejection ratio v s = 4.5v to 16v l 110 130 104 130 db a vol large-signal voltage gain r l 3 2k, v o = 10v l 3.0 14.0 2.0 14.0 v/ m v r l 3 1k, v o = 10v 2.0 10.0 1.5 10.0 v/ m v v out maximum output voltage swing r l 3 2k l 10.3 11.6 10.3 11.6 v i s supply current l 8.7 11.5 9.0 13.0 ma lt1028am lt1128am lt1028m lt1128m e lectr ic al c c hara terist ics v s = 15v, C55 c t a 125 c, unless otherwise noted.
4 lt1028/lt1128 symbol parameter conditions min typ max min typ max units v os input offset voltage (note 1) l 15 80 30 125 m v d v os average input offset drift (note7) l 0.1 0.8 0.2 1.0 m v/ c d temp i os input offset current v cm = 0v l 15 65 22 130 na i b input bias current v cm = 0v l 30 120 40 240 na input voltage range l 10.5 12.0 10.5 12.0 v cmrr common-mode rejection ratio v cm = 10.5v l 110 124 106 124 db psrr power supply rejection ratio v s = 4.5v to 18v l 114 132 107 132 db a vol large-signal voltage gain r l 3 2k, v o = 10v l 5.0 25.0 3.0 25.0 v/ m v r l 3 1k, v o = 10v 4.0 18.0 2.5 18.0 v/ m v v out maximum output voltage swing r l 3 2k l 11.5 12.7 11.5 12.7 v r l 3 600 w (note 9) 9.5 11.0 9.0 10.5 v i s supply current l 8.0 10.5 8.2 11.5 ma v s = 15v, 0 c t a 70 c, unless otherwise noted. lt1028ac lt1128ac lt1028c lt1128c e lectr ic al c c hara terist ics symbol parameter conditions min typ max min typ max units v os input offset voltage l 20 95 35 150 m v d v os average input offset drift l 0.2 0.8 0.25 1.0 m v/ c d temp i os input offset current v cm = 0v l 20 80 28 160 na i b input bias current v cm = 0v l 35 140 45 280 na input voltage range l 10.4 11.8 10.4 11.8 v cmrr common-mode rejection ratio v cm = 10.5v l 108 123 102 123 db psrr power supply rejection ratio v s = 4.5v to 18v l 112 131 106 131 db a vol large-signal voltage gain r l 3 2k, v o = 10v l 4.0 20.0 2.5 20.0 v/ m v r l 3 1k, v o = 10v 3.0 14.0 2.0 14.0 v/ m v v out maximum output voltage swing r l 3 2k l 11.0 12.5 11.0 12.5 v i s supply current l 8.5 11.0 8.7 12.5 ma v s = 15v, C 40 c t a 85 c, unless otherwise noted. (note 10) lt1028ac lt1128ac lt1028c lt1128c e lectr ic al c c hara terist ics on an rms basis) is divided by the sum of the two source resistors to obtain current noise. maximum 10hz current noise can be inferred from 100% testing at 1khz. note 6: gain-bandwidth product is not tested. it is guaranteed by design and by inference from the slew rate measurement. note 7: this parameter is not 100% tested. note 8: the inputs are protected by back-to-back diodes. current-limiting resistors are not used in order to achieve low noise. if differential input voltage exceeds 1.8v, the input current should be limited to 25ma. note 9: this parameter guaranteed by design, fully warmed up at t a = 70 c. it includes chip temperature increase due to supply and load currents. note 10: the lt1028/lt1128 are not tested and are not quality- assurance-sampled at C40 c and at 85 c. these specifications are guaranteed by design, correlation and/or inference from C55 c, 0 c, 25 c, 70 c and /or 125 c tests. the l denotes specifications which apply over the full operating temperature range. note 1: input offset voltage measurements are performed by automatic test equipment approximately 0.5 sec. after application of power. in addition, at t a = 25 c, offset voltage is measured with the chip heated to approximately 55 c to account for the chip temperature rise when the device is fully warmed up. note 2: long term input offset voltage stability refers to the average trend line of offset voltage vs. time over extended periods after the first 30 days of operation. excluding the initial hour of operation, changes in v os during the first 30 days are typically 2.5 m v. note 3: this parameter is tested on a sample basis only. note 4: 10hz noise voltage density is sample tested on every lot with the exception of the s8 and s16 packages. devices 100% tested at 10hz are available on request. note 5: current noise is defined and measured with balanced source resistors. the resultant voltage noise (after subtracting the resistor noise
5 lt1028/lt1128 cc hara terist ics uw a t y p i ca lper f o r c e 10hz voltage noise distribution total noise vs matched source resistance total noise vs unmatched source resistance current noise spectrum 0.01hz to 1hz voltage noise temperature (?) ?0 0 rms voltage density (nv/ ? hz) 0.8 2.0 0 50 75 lt1028/1128 ?tpc09 o.4 1.6 1.2 ?5 25 100 125 v s = ?5v at 10hz at 1khz voltage noise vs temperature 0.1hz to 10hz voltage noise time (sec) 08 lt1028/1128 ?tpc07 2 4 6 10 10nv v s = ?5v t a = 25? wideband noise, dc to 20khz bandwidth (hz) 100 rms voltage noise ( m v) 0.1 1 100k 1m 10m lt1028/1128 ?tpc03 0.01 10 10k 1k v s = ?5v t a = 25? wideband voltage noise (0.1hz to frequency indicated) matched source resistance ( w ) 1 total noise density (nv/ ? hz) 10 100 3 1k 10k lt1028/1128 ?tpc04 1 0.1 v s = ?5v t a = 25? 10 30 100 300 3k at 10hz 2 r s noise only at 1khz + r s r s unmatched source resistance ( w ) 1 total noise density (nv/ ? hz) 10 100 3 1k 10k lt1028/1128 ?tpc05 1 0.1 v s = ?5v t a = 25? 10 30 100 300 3k at 10hz 2 r s noise only at 1khz r s time (sec) 080 lt1028/1128 ?tpc07 20 40 60 100 10nv v s = ?5v t a = 25? frequency (hz) 10 0.1 current noise density (pa/ ? hz) 1 10 100 100 1k 10k lt1028/1128 ?tpc06 maximum typical 1/f corner = 800hz 1/f corner = 250hz 0.6 0 number of units 20 60 80 100 1.0 1.4 1.8 180 lt1020/1120 ?tpc01 40 0.8 1.2 120 140 160 1.6 2.0 2.2 8 70 148 158 57 28 7 4 2 3 2 22 1 3 2 11 1 v s = ?5v t a = 25? 500 units measured from 4 runs voltage noise density (nv/ ? hz) vertical scale = 0.5 m v/div horizontal scale = 0.5ms/div
6 lt1028/lt1128 cc hara terist ics uw a t y p i ca lper f o r c e supply current vs temperature supply voltage (v) 0 rms voltage noise density (nv/ ? hz) 1.0 1.25 ?5 lt1028/1128 ?tpc16 0.75 0.5 ? ?0 ?0 1.5 t a = 25? at 10hz at 1khz voltage noise vs supply voltage time after power on (minutes) 0 0 change in offset voltage ( m v) 4 8 12 16 20 24 1234 lt1028/1128 ?tpc13 5 v s = ?5v t a = 25? metal can (h) package dual-in-line package plastic (n) or cerdip (j) temperature (?) ?0 0 supply current (ma) 1 3 4 5 10 7 0 50 75 lt1028/1128 ?tpc17 2 8 9 6 ?5 25 100 125 v s = ?5v v s = ?v bias current over the common- mode range warm-up drift output short-circuit current vs time time from output short to ground (minutes) 0 ?0 sinking ?0 ?0 ?0 0 50 20 2 lt1028/1128 ?tpc18 ?0 30 40 10 1 3 short-circuit current (ma) sourcing v s = ?5v 50? 25? 125? 50? 125? 25? distribution of input offset voltage input bias and offset currents over temperature temperature (?c) ?0 input bias and offset currents (na) 40 50 60 25 75 lt1028/1128 ?tpc14 30 20 ?5 0 50 100 125 10 0 v s = ?5v v cm = 0v bias current offset current temperature (?) ?0 ?0 offset voltage ( m v) ?0 ?0 ?0 0 50 20 0 50 75 lt1028/1128 ?tpc11 ?0 30 40 10 ?5 25 100 125 v s = ?5v long-term stability of five representative units time (months) 0 offset voltage change ( m v) 2 6 10 4 lt1028/1128 ?tpc12 ? ? ?0 1 2 3 5 0 4 8 ? ? v s = ?5v t a = 25? t = 0 after 1 day pre-warm up offset voltage drift with temperature of representative units common-mode input voltage (v) ?5 ?0 input bias current (na) ?0 ?0 0 20 ? 5 15 100 lt1028/1128 ?tpc15 ?0 ?0 0 40 60 80 10 r cm = 20v 65na ? 300m w v s = ?5v t a = 25? positive input current (undercancelled) device negative input current (overcancelled) device offset voltage ( m v) ?0 units (%) 12 16 20 30 lt1028/1128 ?tpc10 8 4 0 ?0 ?0 10 50 10 14 18 6 2 20 ?0 ?0 0 40 v s = ?5v t a = 25? 800 units tested from four runs
7 lt1028/lt1128 cc hara terist ics uw a t y p i ca lper f o r c e gain error vs frequency closed-loop gain = 1000 lt1128 gain phase vs frequency lt1028 gain, phase vs frequency voltage gain vs frequency voltage gain vs supply voltage voltage gain vs load resistance load resistance (k w ) 0.1 1 voltage gain (v/ m v) 10 100 110 lt1028/1128 ? tpc26 v s = ?5v t a = 55? t a = 25? t a = 125? i lmax = 35ma at 55? = 27ma at 25? = 16ma at 125? frequency (hz) 10k 5 peak-to-peak output voltage (v) 20 25 30 100k 1m 10m lt1028/1128 ?tpc27 15 10 lt1128 lt1028 v s = ?5v t a = 25? r l = 2k maximum undistorted output vs frequency lt1128 capacitance load handling frequency (hz) 10 voltage gain (db) 20 40 50 70 10k 1m 10m 100m lt1028/1128 ?tpc20 ?0 100k 60 30 0 v s = ?5v t a = 25? c l = 10pf gain phase 10 20 40 50 70 ?0 60 30 0 phase margin ( degrees ) lt1028 capacitance load handling frequency (hz) 0.01 ?0 voltage gain (db) 160 lt1028/1128 ?tpc19 140 120 100 80 60 40 20 0 0.1 1 10 100 1k 10k 100k 1m 10m 100m lt1128 lt1028 v s = ?5v t a = 25? r l = 2k capacitive load (pf) 10 40 overshoot (%) 50 60 70 80 100 1000 10000 lt1028/1128 ?tpc 24 30 20 10 0 v s = ?5v t a = 25? v o = 10mv p-p a v = ?, r s = 2k + c l 2k 30pf r s a v = ?0 r s = 200 w a v = ?00, r s = 20 w frequency (hz) 10 voltage gain (db) 20 40 50 70 10k 1m 10m 100m lt1028/1128 ?tpc23 ?0 100k 60 30 0 v s = ?5v t a = 25? c l = 10pf gain phase 10 20 40 50 70 ?0 60 30 0 phase margin (degrees) frequency (hz) 0.1 0.001 gain error (%) 0.01 0.1 1 1 100 lt1028/1128 ?tpc22 lt1128 lt1028 typical precision op amp gain error = closed-loop gain open-loop gain 10 supply voltage (v) ? 1 10 100 ?0 ?5 lt`1028/1128 ?tpc25 voltage gain (v/ m v) 0 ?0 t a = 25? r l = 2k r l = 600 w capacitive load (pf) 10 40 overshoot (%) 50 60 70 80 100 1000 10000 lt1028/1128 ?tpc21 30 20 10 0 v s = ?5v t a = 25? + c l 2k 30pf r s a v = ?, r s = 2k a v = ?00 r s = 20 w a v = ?0 r s = 200 w
8 lt1028/lt1128 cc hara terist ics uw a t y p i ca lper f o r c e lt1128 large-signal transient response frequency (hz) 10 output impedance ( w ) 1 10 100 100k lt1028/1128 ?tpc34 0.1 0.01 0.001 100 1k 10k 1m i o = 1ma v s = ?5v t a = 25? lt1128 lt1028 lt1128 lt1028 a v = +1000 a v = +5 lt1028 slew rate, gain-bandwidth product over temperature lt1128 slew rate, gain-bandwidth product over temperature lt1028 slew rate, gain-bandwidth product vs over-compensation capacitor lt1128 slew rate, gain-bandwidth product vs over-compensation capacitor closed-loop output impedance temperature (?c) ?0 slew rate (v/ m s) 16 17 18 25 75 lt1028/1128 ?tpc30 15 14 ?5 0 50 100 125 13 12 v s = ?5v 70 80 90 60 50 40 30 gain-bandwidth product (f o = 20khz), (mhz) gbw fall rise temperature (?) ?0 0 slew rate (v/ m s) 1 3 4 5 0 50 100 9 lt1028/1128 ?tpc33 2 ?5 25 6 7 8 75 125 20 10 30 gain-bandwidth product (f o = 200khz), (mhz) fall rise gbw over-compensation capacitor (pf) 1 slew rate (v/ m s) 10 1 100 1000 10000 lt1028/1128 ?tpc36 0.1 10 100 1k 10k gain at 20khz c oc from pin 5 to pin 6 v s = ?5v t a = 25? slew gbw 100 10 over-compensation capacitor (pf) 1 slew rate (v/ m s) 10 1 100 1000 10000 lt1028/1128 ?tpc35 0.1 10 100 10 100 1 1k gain at 200khz gbw slew rate over-compensation capacitor (pf) 1 10 1 100 1000 10000 lt1028/1128 ?tpc35 0.1 10 100 10 100 1k gbw slew rate 1 0v a v = C1, r s = r f = 2k, c f = 30pf 2 m s/div lt1128 small-signal transient response 0.2 m s/div 20mv/div a v = C1, r s = r f = 2k c f = 15pf, c l = 80pf C50mv 50mv 5v/div 10v C10v 0v 10v C50mv 50mv C10v 0.2 m s/div 1 m s/div a v = C1, r s = r f = 2k, c f = 15pf a v = +1, c l = 10pf lt1028 large-signal transient response lt1028 small-signal transient response
9 lt1028/lt1128 cc hara terist ics uw a t y p i ca lper f o r c e lt1128 total harmonic distortion vs closed-loop gain common-mode limit over temperature lt1028 total harmonic distortion vs frequency and load resistance frequency (hz) 10 80 100 120 10k 1m lt1028/1128 ?tpc38 60 40 100 1k 100k 10m 20 0 common-mode rejection ratio (db) 140 v s = ?5v t a = 25? lt1128 lt1028 common-mode rejection ratio vs frequency power supply rejection ratio vs frequency frequency (hz) 10k 0.1 1.0 10 100k 1m lt1028/1128 ?tpc42 noise voltage density (nv/ ? hz) high frequency voltage noise vs frequency lt1028 total harmonic distortion vs closed-loop gain frequency (hz) 0.1 power supply rejection ratio (db) 80 100 120 10m lt1028/1128 ?tpc39 60 40 0 10 1k 100k 20 160 140 1m 1 100 10k v s = ?5v t a = 25? negative supply positive supply lt1128 total harmonic distortion vs frequency and load resistance temperature (?) ?0 v common-mode limit (v) referred to power supply 1 3 4 v + ? 0 50 75 lt1028/1128 ?tpc37 2 ? ? ? ?5 25 100 125 v s = 5v v s = 5v to ?5v v s = ?5v closed loop gain 0.001 total harmonic distortion (%) 0.01 10 1k 10k 100k lt1028/1128 ?tpc41 0.0001 100 0.1 v o = 20v p-p f = 1khz v s = ?5v t a = 25? r l = 10k non-inverting gain inverting gain measured extrapolated closed loop gain 0.001 total harmonic distortion (%) 0.01 10 1k 10k 100k lt1028/1128 ?tpc44 0.0001 100 0.1 v o = 20v p-p f = 1khz v s = 15v t a = 25 c r l = 10k non-inverting gain inverting gain measured extrapolated frequency (khz) 1 0.001 total harmonic distortion (%) 0.01 0.1 10 100 lt1028/1128 ?tpc40 a v = +1000 r l = 600 w a v = +1000 r l = 2k a v = ?000 r l = 2k v o = 20v p-p v s = ?5v t a = 25? a v = +1000 r l = 600 w frequency (khz) 1.0 0.001 total harmonic distortion (%) 0.1 1.0 10 100 lt1028/1128 ?tpc43 0.01 a v = +1000 r l = 600 w a v = ?000 r l = 2k v o = 20v p-p v s = ?5v t a = 25? a v = +1000 r l = 600 w a v = +1000 r l = 2k
10 lt1028/lt1128 voltage noise vs current noise the lt1028/lt1128s less than 1nv/ ? hz voltage noise is three times better than the lowest voltage noise heretofore available (on the lt1007/1037). a necessary condition for such low voltage noise is operating the input transistors at nearly 1ma of collector currents, because voltage noise is inversely proportional to the square root of the collector current. current noise, however, is directly proportional to the square root of the collector current. consequently, the lt1028/lt1128s current noise is significantly higher than on most monolithic op amps. therefore, to realize truly low noise performance it is important to understand the interaction between voltage noise (e n ), current noise (i n ) and resistor noise (r n ). total noise vs source resistance the total input referred noise of an op amp is given by e t = [ e n 2 + r n 2 + (i n r eq ) 2 ] 1/2 where r eq is the total equivalent source resistance at the two inputs, and r n = ? 4ktr eq = 0.13 ? r eq in nv/ ? hz at 25 c as a numerical example, consider the total noise at 1khz of the gain 1000 amplifier shown below. r eq = 100 w + 100 w || 100k ? 200 w r n = 0.13 ? 200 = 1.84nv ? hz e n = 0.85nv ? hz i n = 1.0pa/ ? hz e t = [ 0.85 2 + 1.84 2 + (1.0 0.2) 2 ] 1/2 = 2.04nv/ ? hz output noise = 1000 e t = 2.04 m v/ ? hz at very low source resistance (r eq < 40 w ) voltage noise dominates. as r eq is increased resistor noise becomes the largest term, as in the example above, and the lt1028/ lt1128s voltage noise becomes negligible. as r eq is further increased, current noise becomes important. at 1khz, when r eq is in excess of 20k, the current noise component is larger than the resistor noise. the total noise versus matched source resistance plot illustrates the above calculations. the plot also shows that current noise is more dominant at low frequencies, such as 10hz. this is because resistor noise is flat with frequency, while the 1/f corner of current noise is typically at 250hz. at 10hz when r eq > 1k, the current noise term will exceed the resistor noise. when the source resistance is unmatched, the total noise versus unmatched source resistance plot should be con- sulted. note that total noise is lower at source resistances below 1k because the resistor noise contribution is less. when r s > 1k total noise is not improved, however. this is because bias current cancellation is used to reduce input bias current. the cancellation circuitry injects two correlated current noise components into the two inputs. with matched source resistors the injected current noise creates a common-mode voltage noise and gets rejected by the amplifier. with source resistance in one input only, the cancellation noise is added to the amplifiers inherent noise. in summary, the lt1028/lt1128 are the optimum ampli- fiers for noise performance, provided that the source resistance is kept low. the following table depicts which op amp manufactured by linear technology should be used to minimize noise, as the source resistance is in- creased beyond the lt1028/lt1128s level of usefulness. + 100 w 100k 100 w lt1028 lt1128 1028/1128 ai01 u s a o pp l ic at i wu u i for atio ? oise u best op amp at low freq(10hz) wideband(1khz) source resis- tance( w ) (note 1) best op amp for lowest total noise vs source resistance 0 to 400 lt1028/lt1128 lt1028/lt1128 400 to 4k lt1007/1037 lt1028/lt1128 4k to 40k lt1001 lt1007/1037 40k to 500k lt1012 lt1001 500k to 5m lt1012 or lt1055 lt1012 >5m lt1055 lt1055 note 1: source resistance is defined as matched or unmatched, e.g., r s = 1k means: 1k at each input, or 1k at one input and zero at the other.
11 lt1028/lt1128 u s a o pp l ic at i wu u i for atio 0.1hz to 10hz noise test circuit 0.1hz to 10hz peak-to-peak noise tester frequency response frequency (hz) 40 gain (db) 60 70 90 100 0.01 1.0 10 100 lt1028/1128 ?ai03 30 0.1 50 80 + voltage gain = 50,000 * device under test note all capacitor values are for nonpolarized capacitors only 100k 100 w + 2k 4.7 m f 0.1 m f 100k 24.3k 22 m f 2.2 m f 4.3k 110k scope 1 r in = 1m 0.1 m f * 1028/1128 ai02 lt1001 ? oise u noise testing C voltage noise the lt1028/lt1128's rms voltage noise density can be accurately measured using the quan tech noise analyzer, model 5173 or an equivalent noise tester. care should be taken, however, to subtract the noise of the source resistor used. prefabricated test cards for the model 5173 set the device under test in a closed-loop gain of 31 with a 60 w source resistor and a 1.8k feedback resistor. the noise of this resistor combination is 0.13 ? 58 = 1.0nv/ ? hz. an lt1028/lt1128 with 0.85nv/ ? hz noise will read (0.85 2 + 1.0 2 ) 1/2 = 1.31nv/ ? hz. for better resolution, the resistors should be replaced with a 10 w source and 300 w feedback resistor. even a 10 w resistor will show an apparent noise which is 8% to 10% too high. the 0.1hz to 10hz peak-to-peak noise of the lt1028/ lt1128 is measured in the test circuit shown. the fre- quency response of this noise tester indicates that the 0.1hz corner is defined by only one zero. the test time to measure 0.1hz to 10hz noise should not exceed 10 seconds, as this time limit acts as an additional zero to eliminate noise contributions from the frequency band below 0.1hz. measuring the typical 35nv peak-to-peak noise perfor- mance of the lt1028/lt1128 requires special test pre- cautions: (a) the device should be warmed up for at least five minutes. as the op amp warms up, its offset voltage changes typically 10 m v due to its chip temperature increasing 30 c to 40 c from the moment the power supplies are turned on. in the 10 second measure- ment interval these temperature-induced effects can easily exceed tens of nanovolts. (b) for similar reasons, the device must be well shielded from air current to eliminate the possibility of thermo- electric effects in excess of a few nanovolts, which would invalidate the measurements. (c) sudden motion in the vicinity of the device can also feedthrough to increase the observed noise. a noise-voltage density test is recommended when mea- suring noise on a large number of units. a 10hz noise- voltage density measurement will correlate well with a 0.1hz to 10hz peak-to-peak noise reading since both results are determined by the white noise and the location of the 1/f corner frequency.
12 lt1028/lt1128 noise testing C current noise current noise density (i n ) is defined by the following formula, and can be measured in the circuit shown: if the quan tech model 5173 is used, the noise reading is input-referred, therefore the result should not be divided by 31; the resistor noise should not be multiplied by 31. 100% noise testing the 1khz voltage and current noise is 100% tested on the lt1028/lt1128 as part of automated testing; the approxi- mate frequency response of the filters is shown. the limits on the automated testing are established by extensive correlation tests on units measured with the quan tech model 5173. u s a o pp l ic at i wu u i for atio 10hz voltage noise density is sample tested on every lot. devices 100% tested at 10hz are available on request for an additional charge. 10hz current noise is not tested on every lot but it can be inferred from 100% testing at 1khz. a look at the current noise spectrum plot will substantiate this statement. the only way 10hz current noise can exceed the guaranteed limits is if its 1/f corner is higher than 800hz and/or its white noise is high. if that is the case then the 1khz test will fail. i n = [e no 2 ?(31 18.4nv/ ? hz) 2 ] 1/2 20k 31 + e no 1.8k 60 w lt1028 lt1128 10k 10k 1028/1128 ai04 ? oise u frequency (hz) 100 ?0 noise filter loss (db) ?0 0 10 1k 10k 100k lt1028/1128 ?ai05 ?0 ?0 ?0 current noise voltage noise u s a o pp l ic at i wu u i for atio general the lt1028/lt1128 series devices may be inserted di- rectly into op-07, op-27, op-37, lt1007 and lt1037 sockets with or without removal of external nulling com- ponents. in addition, the lt1028/lt1128 may be fitted to 5534 sockets with the removal of external compensation components. offset voltage adjustment the input offset voltage of the lt1028/lt1128 and its drift with temperature, are permanently trimmed at wafer test- ing to a low level. however, if further adjustment of v os is necessary, the use of a 1k nulling potentiometer will not degrade drift with temperature. trimming to a value other automated tester noise filter + 6 1k input lt1028 lt1128 1028/1128 ai06 7 8 1 2 3 4 output ?5v 15v than zero creates a drift of (v os /300) m v/ c, e.g., if v os is adjusted to 300 m v, the change in drift will be 1 m v/ c. the adjustment range with a 1k pot is approximately 1.1mv. offset voltage and drift thermocouple effects, caused by temperature gradients across dissimilar metals at the contacts to the input
13 lt1028/lt1128 frequency response the lt1028s gain, phase vs frequency plot indicates that the device is stable in closed-loop gains greater than +2 or C1 because phase margin is about 50 at an open-loop gain of 6db. in the voltage follower configuration phase margin seems inadequate. this is indeed true when the output is shorted to the inverting input and the noninvert- ing input is driven from a 50 w source impedance. how- ever, when feedback is through a parallel r-c network (provided c f < 68pf), the lt1028 will be stable because of interaction between the input resistance and capacitance and the feedback network. larger source resistance at the noninverting input has a similar effect. the following voltage follower configurations are stable: another configuration which requires unity-gain stability is shown below. when c f is large enough to effectively short the output to the input at 15mhz, oscillations can occur. the insertion of r s2 3 500 w will prevent the lt1028 from oscillating. when r s1 3 500 w , the additional noise contribution due to the presence of r s2 will be minimal. when r s1 100 w , r s2 is not necessary, be- cause r s1 represents a heavy load on the output through the c f short. when 100 w < r s1 < 500 w , r s2 should match r s1 . for example, r s1 = r s2 = 300 w will be stable. the noise increase due to r s2 is 40%. u s a o pp l ic at i wu u i for atio terminals, can exceed the inherent drift of the amplifier unless proper care is exercised. air currents should be minimized, package leads should be short, the two input leads should be close together and maintained at the same temperature. the circuit shown to measure offset voltage is also used as the burn-in configuration for the lt1028/lt1128. 1028/1128 ai09 + 33pf 2k lt1028 50 w + lt1028 50 w 500 w 1028/1128 ai10 c1 r1 r s1 r s2 lt1028 + unity-gain buffer applications (lt1128 only) when r f 100 w and the input is driven with a fast, large- signal pulse (>1v), the output waveform will look as shown in the pulsed operation diagram. during the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. with r f 3 500 w , the output is capable of handling the current requirements (i l 20ma at 10v) and the amplifier stays in its active mode and a smooth transition will occur. as with all operational amplifiers when r f > 2k, a pole will be created with r f and the amplifiers input capacitance, creating additional phase shift and reducing the phase margin. a small capacitor (20pf to 50pf) in parallel with r f will eliminate this problem. test circuit for offset voltage and offset voltage drift with temperature + ?5v 10k* 200 w * lt1028 lt1128 1028/1128 ai08 10k* v o = 100v os * resistors must have low thermoelectric potential v o 6 7 2 4 3 15v + r f 1028/1128 ai07 output 6v/ m s
14 lt1028/lt1128 u s a o pp l ic at i wu u i for atio if c f is only used to cut noise bandwidth, a similar effect can be achieved using the over-compensation terminal. the gain, phase plot also shows that phase margin is about 45 at gain of 10 (20db). the following configura- tion has a high ( ? 70%) overshoot without the 10pf capacitor because of additional phase shift caused by the feedback resistor C input capacitance pole. the presence of the 10pf capacitor cancels this pole and reduces overshoot to 5%. over-compensation the lt1028/lt1128 are equipped with a frequency over- compensation terminal (pin 5). a capacitor connected between pin 5 and the output will reduce noise bandwidth. details are shown on the slew rate, gain-bandwidth product vs over-compensation capacitor plot. an addi- tional benefit is increased capacitive load handling capa- bility. 1028/1128 ai11 10pf 10k 50 w 1.1k + lt1028 u a o pp l ic at i ty p i ca l strain gauge signal conditioner with bridge excitation low noise voltage regulator 1028/1128 ta05 1 m f reference output + lt1128 30.1k* 49.9 w * 15v 330 w 10k zero trim 5.0v 301k* lt1021-5 0v to 10v output 3 2 7 6 4 350 w bridge ?5v 15v 15v lt1028 + 3 2 7 6 4 ?5v lt1028 + 3 2 7 6 4 ?5v 5k gain trim 330 w *rn60c film resistors the lt1028? noise contribution is negligible compared to the bridge noise. 1028/1128 ta04 10 2k 20v output + lt1028 2.3k provides pre-reg and current limiting 10 + 28v 121 w 2k 330 w 1000pf 1k 28v lt317a lt1021-10 2n6387
15 lt1028/lt1128 u a o pp l ic at i ty p i ca l paralleling amplifiers to reduce voltage noise tape head amplifier 1028/1128 ta07 0.1 m f 10 w + lt1028 output 499 w tape head input 6 31.6k 2 3 all resistors metal film phono preamplifier 1028/1128 ta06 0.1 m f 10 w ?5v 10k + lt1028 output 787 w 0.33 m f 100pf 47k mag phono input 4 6 7 15v 2 3 all resistors metal film low noise, wide bandwidth instrumentation amplifier gyro pick-off amplifier 1028/1128 ta08 10 w + lt1028 output 820 w +input 68pf 10k 50 w 68pf 820 w + lt1028 input + lt1028 300 w 300 w 10k gain = 1000, bandwidth = 1mhz input referred noise = 1.5nv/ ? hz at 1khz wideband noise ?c to 1mhz = 3 m v rms if bw limited to dc to 100khz = 0.55 m v rms 1028/1128 ta09 100 w output to sync demodulator 1k + lt1028 sine drive gyro typical? northrop corp. gr-f5ah7-5b 1028/1128 ta03 + 1.5k a1 lt1028 470 w output + 7.5 w 4.7k + 1.5k 470 w 7.5 w + 1.5k 470 w 7.5 w a2 lt1028 an lt1028 lt1028 output noise n 200 0.9 ? n 1. assume voltage noise of lt1028 and 7.5 w source resistor = 0.9nv/ ? hz. 2. gain with n lt1028s in parallel = n 200. 3. output noise = ? n 200 0.9nv/ ? hz. 4. input referred noise = = nv/ ? hz. 5. noise current at input increases ? n times. 6. if n = 5, gain = 1000, bandwidth = 1mhz, rms noise, dc to 1mhz = = 0.9 m v. 2 m v ? 5
16 lt1028/lt1128 u a o pp l ic at i ty p i ca l super low distortion variable sine wave oscillator 1028/1128 ta10 + lt1028 c2 0.047 r2 r1 c1 0.047 2k 20 w 20 w 2k 10pf 5.6k 15 m f + 22k 10k + lt1055 1v rms output 1.5khz to 15khz where r1c1 = r2c2 f = 1 2?c () mount 1n4148s in close proximity trim for lowest distortion 100k 10k 20k 2n4338 560 w 2.4k 4.7k lt1004-1.2v 15v <0.0018% distortion and noise. measurement limited by resolution of hp339a distortion analyzer 1028/1128 ta11 + lt1052 10 w 0.1 30k 10k 15v 7 6 4 2 3 8 1 ?5v 0.1 0.01 15v 68 w + lt1028 130 w 1 7 8 4 ?5v input output 1n758 1n758 100k 2 3 chopper-stabilized amplifier low noise infrared detector 1028/1128 ta12 10 w 1m 1k 10k 5v + lt1028 7 6 4 2 3 8 ?v 1000 m f dc out 5v 39 w 33 w + 267 w 10 w + + optical chopper wheel ir radiation photo- electric pick-off infra red associates, inc. hgcdte ir detector 13 w at 77? 1/4 ltc1043 30pf 100 m f 100 m f 13 14 16 10k* 10k* synchronous demodulator + lt1012 7 4 2 3 ?v 6 5v 1 8 12 + lm301a 7 4 2 3 ?v 6 5v 1 8
17 lt1028/lt1128 s w a w ch e ti i cdagra 1.5 m a 1 null r5 130 w r6 130 w r1 3k r2 3k 3 8 null q4 c1 257pf 900 m a 900 m a q6 q5 q9 q8 q7 q2 4.5 m a 4.5 m a 1.5 m a q13 q14 q1 4.5 m a non- inverting input 0 1.8ma q3 bias 2 interving input 4 v r7 80 w q11 q10 q12 300 m a q15 q21 5 over- comp q23 600 m a r12 240 w c4 35pf q22 r11 100 w c3 250pf q19 q18 q16 q17 r11 400 w r10 400 w 1.1ma 2.3ma 400 m a v + 7 r10 500 w c2 q26 q25 q24 6 output q27 1028/1128 ta13 4.5 m a 3 1 3 1 q20 r8 480 w 500 m a c2 = 50pf for lt1028 c2 = 275pf for lt1128
18 lt1028/lt1128 package descriptio u j8 package 8-lead ceramic dip n8 package 8-lead plastic dip s8 package 8-lead plastic soic 0.038 ?0.068 (0.965 ?1.727) 0.014 ?0.026 (0.360 ?0.660) 0.200 (5.080) max 0.015 ?0.060 (0.381 ?1.524) 0.125 3.175 min 0.100 ?0.010 (2.540 ?0.254) 0.290 ?0.320 (7.366 ?8.128) 0.008 ?0.018 (0.203 ?0.460) 0??15 0.385 ?0.025 (9.779 ?0.635) 0.055 (1.397) max 0.005 (0.127) min 0.405 (10.287) max 0.220 ?0.310 (5.588 ?7.874) 12 3 4 87 65 0.025 (0.635) rad typ 0.045 ?0.015 (1.143 ?0.381) 0.100 ?0.010 (2.540 ?0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 ?0.005 (3.302 ?0.127) 0.020 (0.508) min 0.018 ?0.003 (0.457 ?0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.250 ?0.010 (6.350 ?0.254) 0.400 (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.320 (7.620 ?8.128) 0.325 +0.025 0.015 +0.635 0.381 8.255 () 1 2 3 4 0.150 ?0.157 (3.810 ?3.988) 8 7 6 5 0.189 ?0.197 (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) 0.010 ?0.020 (0.254 ?0.508) 0.016 ?0.050 0.406 ?1.270 45 0 8?typ 0.008 ?0.010 (0.203 ?0.254) 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc t jmax q ja 165 c 100 c/w t jmax q ja 130 c 130 c/w t jmax q ja 135 c 140 c/w dimensions in inches (millimeters) unless otherwise noted.
19 lt1028/lt1128 note: lead diameter is uncontrolled between the reference plane and seating plane. 0.050 (1.270) max 0.016 ?0.021 (0.406 ?0.533) typ 0.010 ?0.045 (0.254 ?1.143) seating plane 0.040 (1.016) max 0.165 ?0.185 (4.191 ?4.699) gauge plane reference plane 0.500 ?0.750 (12.70 ?19.05) 0.305 ?0.335 (7.747 ?8.509) 0.335 ?0.370 (8.509 ?9.398) dia 0.200 ?0.230 (5.080 ?5.842) bsc 0.027 ?0.045 (0.686 ?1.143) 0.027 ?0.034 (0.686 ?0.864) 0.110 ?0.160 (2.794 ?4.064) insulating standoff 45?yp 1 2 3 4 5 6 7 8 note: pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options. see note 0.398 ?0.413 (10.109 ?10.490) 16 15 14 13 12 11 10 9 1 23 4 5 6 78 0.394 ?0.419 (10.007 ?10.643)sol16 0.037 ?0.045 (0.940 ?1.143) 0.004 ?0.012 (0.102 ?0.305) 0.093 ?0.104 (2.362 ?2.642) 0.050 (1.270) typ 0.014 ?0.019 (0.356 ?0.482) typ 0??8?typ see note 0.005 (0.127) rad min 0.009 ?0.013 (0.229 ?0.330) 0.016 ?0.050 (0.406 ?1.270) 0.291 ?0.299 (7.391 ?7.595) 45 0.010 ?0.029 (0.254 ?0.737) s package 16-lead plastic sol package descriptio u dimensions in inches (millimeters) unless otherwise noted. information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. h package 8-lead to-5 metal can t jmax q ja 140 c 130 c/w t jmax q ja q jc 175 c 140 c/w 40 c/w
20 lt1028/lt1128 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7487 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 ? linear technology corporation 1992 lt/gp 0792 10k rev 0 07/10/92 u.s. area sales offices northeast region central region northwest region linear technology corporation linear technology corporation linear technology corporation one oxford valley chesapeake square 782 sycamore dr. 2300 e. lincoln hwy.,suite 306 229 mitchell court, suite a-25 milpitas, ca 95035 langhorne, pa 19047 addison, il 60101 phone: (408) 428-2050 phone: (215) 757-8578 phone: (708) 620-6910 fax: (408) 432-6331 fax: (215) 757-5631 fax: (708) 620-6977 southeast region southwest region linear technology corporation linear technology corporation 17060 dallas parkway 22141 ventura blvd. suite 208 suite 206 dallas, tx 75248 woodland hills, ca 91364 phone: (214) 733-3071 phone: (818) 703-0835 fax: (214) 380-5138 fax: (818) 703-0517 international sales offices france korea taiwan linear technology s.a.r.l. linear technology korea branch linear technology corporation immeuble "le quartz" namsong building, #505 rm. 801, no. 46, sec. 2 58 chemin de la justice itaewon-dong 260-199 chung shan n. rd. 92290 chatenay mallabry yongsan-ku, seoul taipei, taiwan, r.o.c. france korea phone: 886-2-521-7575 phone: 33-1-46316161 phone: 82-2-792-1617 fax: 886-2-562-2285 fax: 33-1-46314613 fax: 82-2-792-1619 germany singapore united kingdom linear techonolgy gmbh linear technology pte. ltd. linear technology (uk) ltd. untere hauptstr. 9 101 boon keng road the coliseum, riverside way d-8057 eching #02-15 kallang ind. estates camberley, surrey gu15 3yl germany singapore 1233 united kingdom phone: 49-89-3197410 phone: 65-293-5322 phone: 44-276-677676 fax: 49-89-3194821 fax: 65-292-0398 fax: 44-276-64851 japan linear technology kk 4f ichihashi building 1-8-4 kudankita chiyoda-ku tokyo, 102 japan phone: 81-3-3237-7891 fax: 81-3-3237-8010 world headquarters linear technology corporation 1630 mccarthy blvd. milpitas, ca 95035-7487 phone: (408) 432-1900 fax: (408) 434-0507

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